Semiconductor devices have become increasingly more integrated and smaller with multilayered interconnections and consequently, the amount of processing steps have increased to form multiple conductive layers or insulating layers on a wafer. To eliminate steps in semiconductor device fabrication, CMP is commonly used, which is a combination of chemical and mechanical processes. CMP was developed in the late 1980s by International Business Machines Corporation. Since its introduction, CMP has been applied as a core micro-processing technique at almost all stages of fabrication of 64 Mbit or greater memory and non-memory devices. Currently, CMP is receiving great consideration for use in the fabrication of next generation gagibit level DRAM memories or equivalent level non-memory devices.
CMP is a type of planarization process. In CMP, a wafer surface having irregularities is pressed against a rotating polishing pad, while an abrasive slurry is made to flow to a contact area of the wafer and polishing pad. CMP planarizes the irregular wafer surface by means of chemical and physical reactions. The performance of CMP is determined by factors such as the operating conditions of a CMP apparatus, the type of slurry, and the type of polishing pad.
Among such factors, the type of slurry that is used for CMP is the most critical factor affecting polishing performance. It is preferable for a CMP slurry to provide high planarity and a high selectivity ratio. However, conventional slurries that provide insufficient planarity generate dishing on a CMP processed surface, which can cause short-circuits between interconnects. Moreover, with conventional CMP slurries, which are used in the formation of shallow trench isolation (STI) or the formation of an interlayer dielectric (ILD) layer, wherein a self-aligned contact hole exposing a source/drain region of a DRAM is formed, the selectivity of a target layer to be polished (e.g., an oxide layer) with respect to a polishing stopper (e.g., a silicon nitride layer) is at a ratio of 4:1, which is considered a poor selectivity. As a result, the polishing stopper is excessively polished. To combat excessive polishing of the stopper, the thickness of the polishing stopper must be increased. Further, with conventional slurries, the polishing stopper remaining after the CMP has thickness variations, which results in an uneven wafer surface and reduces a margin for subsequent device manufacturing processes. As a result, the characteristics of the semiconductor device can degrade. Accordingly, there is a need for CMP slurries that provide high planarity and high selectivity.